缩写名/全名 |
INTEGRATION
INTEGRATION-THE VLSI JOURNAL |
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ISSN号 | 0167-9260 | ||||||||||||||||||||||||
研究方向 | 工程技术-工程:电子与电气 | ||||||||||||||||||||||||
影响因子 | 2015:0.703, 2016:1, 2017:0.906, 2018:1.15, 2019:1.214, | ||||||||||||||||||||||||
出版国家 | NETHERLANDS | ||||||||||||||||||||||||
出版周期 | Quarterly | ||||||||||||||||||||||||
年文章数 | 144 | ||||||||||||||||||||||||
出版年份 | 1983 | ||||||||||||||||||||||||
是否OA | No | ||||||||||||||||||||||||
审稿周期(仅供参考) | >12周,或约稿 来源Elsevier官网:平均12.8周 |
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录用比例 | 容易 | ||||||||||||||||||||||||
投稿链接 | http://ees.elsevier.com/vlsi/ | ||||||||||||||||||||||||
投稿官网 | http://www.elsevier.com/wps/find/journaldescription.cws_home/505653/description | ||||||||||||||||||||||||
h-index | 33 | ||||||||||||||||||||||||
CiteScore |
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PubMed Central (PMC)链接 | http://www.ncbi.nlm.nih.gov/nlmcatalog?term=0167-9260%5BISSN%5D | ||||||||||||||||||||||||
中科院SCI期刊分区 ( 2018年新版本) |
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中科院SCI期刊分区 ( 2020年新版本) |
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中国学者近期发表的论文 | |
1. | A reconfigurable 4-GS/s power-efficient floating-point FFT processor design and implementation based on single-sided binary-tree decomposition Author: Xing Wei, Haigang Yang, Wei Li, Zhihong Huang, Tao Yin, Le Yu Journal: INTEGRATION-THE VLSI JOURNAL, 2019, Vol., , DOI:10.1016/j.vlsi.2019.02.008 DOI |
2. | A coin-battery-powered LDO-Free 2.4-GHz Bluetooth Low Energy/ZigBee receiver consuming 2 mA Author: Zechariah Balan, Harikrishnan Ramiah, Jagadheswaran Rajendran, Nandini Vitee, Pravinah Nair Shasidharan, Jun Yin, Pui-In Mak, Rui P. Martins Journal: INTEGRATION-THE VLSI JOURNAL, 2019, Vol., , DOI:10.1016/j.vlsi.2019.01.009 DOI |
3. | Actors with stretchable access patterns Author: Ke Du, Stéphane Domas, Michel Lenczner Journal: INTEGRATION-THE VLSI JOURNAL, 2019, Vol., , DOI:10.1016/j.vlsi.2019.01.001 DOI |
4. | Testing aware dynamic mapping for path-centric network-on-chip test Author: Shuyan Jiang, Qiong Wu, Shuyu Chen, Junkai Zhan, Junshi Wang, Masoumeh Ebrahimi, Letian Huang Journal: INTEGRATION-THE VLSI JOURNAL, 2018, Vol., , DOI:10.1016/j.vlsi.2018.11.009 DOI |
5. | Parallelizing SAT-based de-camouflaging attacks by circuit partitioning and conflict avoiding Author: Xueyan Wang, Qiang Zhou, Yici Cai, Gang Qu Journal: INTEGRATION-THE VLSI JOURNAL, 2018, Vol., , DOI:10.1016/j.vlsi.2018.10.009 DOI |
6. | Optimized mapping algorithm to extend lifetime of both NoC and cores in many-core system Author: Lihuan Wang, Shuyan Jiang, Shuyu Chen, Junshi Wang, Letian Huang Journal: INTEGRATION-THE VLSI JOURNAL, 2018, Vol., , DOI:10.1016/j.vlsi.2018.10.005 DOI |
7. | PUFPass: A password management mechanism based on software/hardware codesign Author: Qingli Guo, Jing Ye, Bing Li, Yu Hu, Xiaowei Li, Yazhu Lan, Guohe Zhang Journal: INTEGRATION-THE VLSI JOURNAL, 2018, Vol.64, 173-183, DOI:10.1016/j.vlsi.2018.10.003 DOI |
8. | SoC interconnection protection through formal verification Author: Jiaji He, Xiaolong Guo, Travis Meade, Raj Gautam Dutta, Yiqiang Zhao, Yier Jin Journal: INTEGRATION-THE VLSI JOURNAL, 2018, Vol.64, 143-151, DOI:10.1016/j.vlsi.2018.09.007 DOI |
9. | An orchestrated NoC prioritization mechanism for heterogeneous CPU-GPU systems Author: Xiangwei Cai, Jieming Yin, Pingqiang Zhou Journal: INTEGRATION-THE VLSI JOURNAL, 2018, Vol., , DOI:10.1016/j.vlsi.2018.04.005 DOI |
10. | Super current recycling folded cascode amplifier with ultra-high current efficiency Author: Xiao Zhao, Yongqing Wang, Liyuan Dong Journal: INTEGRATION-THE VLSI JOURNAL, 2018, Vol.62, 322-328, DOI:10.1016/j.vlsi.2018.03.019 DOI |
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